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Gate Smashers Digital Logic: study plan and how long it takes

The Gate Smashers playlist is 60 videos and 6.8 hours long. Here's how long it takes at different paces, a week-by-week schedule built from the real videos, and a planner that turns it into your own daily plan.

60 videos · 6.8 hours · Gate Smashers

Gate Smashers' Digital Logic playlist covers number systems, Boolean algebra and canonical forms, K-maps, multiplexers, encoders and decoders, flip-flops and their excitation tables, shift registers and counters.

The last few entries are YouTube Shorts that recap single topics, handy for quick revision.

Who it's for: GATE and university students studying digital logic as part of a CS syllabus.

How long does it take?

The full playlist is 6.8 hours across 60 videos. Here's roughly how many days that is at different daily watch times and speeds, counting video time only:

Days to finish the playlist by daily watch time and playback speed
Daily timeAt 1xAt 1.5xAt 2x
30 min a day14 days10 days7 days
1 h a day7 days5 days4 days
2 h a day4 days3 days2 days

Make your own schedule

The playlist link is already filled in. Press Plan, set how much time you have each day and your speed, and you'll get a day-by-day schedule with a finish date and a calendar file. It reads the live playlist, so new videos are included.

Week-by-week schedule

A sample plan at 30 minutes a day and normal speed, using whole videos so none is split across days. That's 3 weeks in total. For a different pace, start date or speed, use the planner above.

Week 1Videos 1–27 · 2h 56m
  1. Day 1 · 28m

    • 1Lec-1: Digital Logic Syllabus for GATE, UGCNET etc.| Full Playlist for College/University Students5m
    • 2Lec-2: Properties of various Logic Gates | Commutative, Associative, Idempotent9m
    • 3Lec-3: Types of Logic Gates | Symbols | Truth Tables9m
    • 4Lec-4: Implement all Gates using NAND & NOR Gate | Why NAND & NOR are called Universal Gates6m
  2. Day 2 · 26m

    • 5Lec-5: XOR Gate Properties in Hindi with example | Digital Electronics7m
    • 6Lec-6: XNOR Gate Properties in Hindi with example | Digital Electronics6m
    • 7Lec-7: Canonical Sum of Product (SOP) with example7m
    • 8Lec-8: Duality Theorem | How to find Dual of Any Boolean Expression6m
  3. Day 3 · 23m

    • 9Lec-9: Self Dual Function | How to find Self Dual Function of Any Boolean Expression with 1 variable7m
    • 10Lec-10: How many Boolean functions & Self Dual functions Possible with ‘N’ variables6m
    • 11Lec 11: K-Map Minimization Explained | Introduction to Karnaugh Map | Digital Electronics5m
    • 12Lec -12: What is K-Map | Design K-Map | 3 Variable K-Map6m
  4. Day 4 · 22m

    • 13Lec -13: 4 Variable K-Map with examples | Design K-Map | Minimization in Digital Electronics9m
    • 14Lec -14: Essential Prime Implicants vs Prime Implicants | K-Map Minimization with examples7m
    • 15Lec -15: Half Adder | Combinational Circuits |Digital Electronics6m
  5. Day 5 · 24m

    • 16Lec -16: Full Adder | Combinational Circuit | Digital Electronics9m
    • 17Lec -17: Half Subtractor | Combinational Circuits | Digital Electronics4m
    • 18Lec -18: Introduction to Multiplexer | What are Multiplexers | Digital Electronics6m
    • 19Lec - 19: Implement Function using Multiplexer | How Multiplexer implement any function5m
  6. Day 6 · 29m

    • 20Lec -20: How Multiplexers are Functionally Complete | Implement AND, OR & NOT using 2*1 Mux8m
    • 21Lec -21: Introduction to Demultiplexers | What are Demultiplexers | Digital Electronics7m
    • 22Lec -22: Working of Multiplexers | Inside Block Diagram of Multiplexers5m
    • 23Lec -23: Working of Demultiplexers | Digital Electronics4m
    • 24Lec -24: What is Cascading Multiplexer? Multiplexers in Digital Electronic5m
  7. Day 7 · 23m

    • 25Lec -25: Introduction to Encoder and Decoder | Digital Electronics7m
    • 26Lec -26: Sequential Circuit Introduction with examples4m
    • 27Lec -27: SR Latch using NAND Gate | NAND SR Latch | Digital Electronics12m
Week 2Videos 28–47 · 2h 52m
  1. Day 8 · 24m

    • 28Lec - 28: SR flip-flop using NAND gate | Digital Electronics9m
    • 29Lec -29: SR Latch using NOR Gate | NOR SR Latch | Digital Electronics8m
    • 30Lec -30: SR flip-flop using NOR gate | Digital Electronics7m
  2. Day 9 · 22m

    • 31Lec - 31: SR flip flop Characteristic & Excitation Table | Sequential Circuits13m
    • 32Lec -32: Introduction to JK Flip Flop | JK flip flop full explanation | Digital Electronics9m
  3. Day 10 · 27m

    • 33Lec -33: Level Trigger vs Edge Trigger Flip Flop | Types of Triggering8m
    • 34Lec - 34: JK flip flop Characteristic & Excitation Table | Sequential Circuits | Digital Electronics10m
    • 35Lec - 35: Race Around Condition | Race 🏎🏎Condition in JK flip flop9m
  4. Day 11 · 22m

    • 36Lec -36: Master Slave JK Flip Flop | Digital Electronics11m
    • 37Lec -37: Introduction to D Flip Flop | Circuit, Working, Characteristics & Excitation Table7m
    • 38Lec -38: Introduction to T Flip Flop | Circuit, Working, Characteristics & Excitation Table4m
  5. Day 12 · 28m

    • 39Lec -39: Convert SR to D flip flop | Digital Electronics9m
    • 40Lec - 40: T flip flop to JK flip flop Conversion | Digital Logic6m
    • 41Lec - 41:Introduction to Counters | Digital Electronics14m
  6. Day 13 · 21m

    • 42Lec - 42: Synchronous vs Asynchronous counter | Digital Electronics8m
    • 43Lec- 43: Preset & Clear Inputs in Flip flop | Asynchronous Inputs7m
    • 44Lec - 44: UP & Down Counter | Recognize Up & Down Counter6m
  7. Day 14 · 27m

    • 45Lec - 45: Design Synchronous Counter | How to design Synchronous Counter | Digital Electronics11m
    • 46Lec -46: Ring Counter | Synchronous Counters | Digital Electronics9m
    • 47Lec - 47: Johnson Counter | Twisted Ring Counter7m
Week 3Videos 48–60 · 59m
  1. Day 15 · 29m

    • 48Lec - 48: Shift Registers | SISO, SIPO, PISO, PIPO9m
    • 49Lec - 49: Practice question on Shift Register | Digital Electronics5m
    • 50Lec - 50: Convert SR to JK Flip Flop | Digital Electronics7m
    • 51Lec - 51: Convert JK to SR Flip Flop | Digital Electronics8m
  2. Day 16 · 30m

    • 52Lec-15: Ranges of Sign Magnitude, 1’s & 2’s Complement | Number System10m
    • 53XOR Gate ⚡️Properties #digitalelectronics #computer #gatesmashers #shorts #ytshorts #cbse1m
    • 54Universal 🪐 Gates #digitalelectronics #gatesmashers #shorts #ytshorts #computer #binary #cbse1m
    • 55Self 🔄Complementary Codes | Digital Electronics #gatesmashers #shorts #shortvideo1m
    • 56XNOR 🔘 Gate Properties #digitalelectronics #computer #cbse #gatesmashers #shorts #ytshorts1m
    • 57Combinational Circuit & Types #digitalelectronics #computer #cbse #shorts #ytshorts #gatesmashers1m
    • 58Half Adder #digitalelectronics #gatesmashers #computer #computerscience #shorts #coaching1m
    • 59Lec-17: Binary Addition➕ and Subtraction➖ | Number System9m
    • 60Lec - 52: Priority Encoder | Digital Electronics6m

Tips for finishing

  • Practise K-map simplification until it's automatic; it shows up everywhere in the subject.
  • Neso Academy's Digital Electronics course goes deeper if your syllabus is from an electronics programme.